PROFESSIONAL SUMMARY:

• Confidential, Multi - Faceted, Results-Driven, Principal Electrical Engineer possessing exceptional ability for attention to detail while multitasking which allows me to implement new designs and current or new technologies at a faster pace and cheaper cost, providing results and solutions faster, directly reducing time to market and undeniably contributing to a businesses bottom line. Proven Top performer helping companies achieve their products cost and performance goals while integrating essential product features. I am looking to perform new product architecture, develop product specifications, and design new products, while also helping companies leverage their previous investments by improving cost, performance, and manufacturability of existing products using my prevalent Digital and Analog circuit design, Embedded Programming, and Project Management skills.
• Project leader or active team member of 28+ engineering projects lasting from 3 months to 1+ year duration in groups of 3 to 18 people.
• Define critical project related tasks. Schedule & track action items to coordinate & lead meetings to manage projects from initialization through implementation.
• Provide periodic progress reports and track action items for project management.
• Get quotes for, and purchase of test equipment, and software applications for developing products

TECHNICAL SKILLS:

Technology and Tools: The selection and specification of IC s and components for the design and development of digital (microprocessor / DSP, logic CPLD, FPGA, ASIC, memory Sram, Dram, SDram, DDRam, Flash, EEprom) and analog circuits (OPAmps, Level Shifters, Active filters, Comparators). Design and development of Mixed Signal circuits with A/D and D/A converters. Extensive CPLD/FPGA design and simulation in HDL, VHDL and Verilog using timers, counters, registers, and combinatorial logic to perform functions of state machines, access arbitration, address decoding, memory timing, peripheral control, bus error checking, perform CRC, watchdog control, and proprietary design. Altera Quartus, Xilinx ISE, Xilinx Vivado, Lattice Diamond, Mentor Modelsim, Chronology timing designer. Wrote run time Embedded firmware in C programming and processor specific assembly language on multiple embedded projects on multiple different platforms, and wide range of microprocessors using IAR workbench, Codewarrior, Code Composer, Kinetis Design Studio and Eclipse. Extensive use of software debugger, logic analyzer, and oscilloscope, In Circuit Emulators, Multi - meters, and protocol analyzers, spectrum analyzers, other test equipment for product development, failure analysis, trouble shooting, and verification testing of Software, Firmware, and Hardware. Write Theory of Operation, product requirements and specification documents, Perform Design Verification Testing and document results in archived engineering index. Delegate tasks to and direct technicians. Freescale Power PC MPC866, 68xx040, 68xx020, 68000, 68HC11, 68HC08, 68HC05, MCF5213, Microchip PIC 16C5x family, Intel 8x48, 8x49, 8x51, 8086, 8x186. Analog Dev. AD9843A, ADSP2185 DSP, Texas Inst TMS320LF2406 DSP, Texas Inst TMS320C6727 DSP, Atmel AT91SAM7SE, TI C5535 DSP, ARM Core Extensive peripheral design of RS232, RS485, parallel communications, displays interfaces, SPI, I2C, I2S, operator input devices, memory interface design of SDRAM, FLASH, EPROM, Dual Port ram, SRAM, bus design, Ethernet physical layer interface, USB interface. CAN J1939. Design linear and switching power supplies < 100W. Ruggedized design for extreme environments (temperature, pressure, vibration, dust, dirt, etc.), Design for In Circuit Test, manufacturing, Design for compliance to EMC, UL, FCC, CSA, MIL-STD, SIL. Perform EMC testing for Radiated Emissions and EMI Immunity per CISPR 22 class A & B and EN 61000 series. Quality Standards IEC 60601-X. AS9100 IEC 60364-X. DO-254. Perform and Direct CAD layout of circuit boards. Check finished design Gerber files using different software verification tools. Perform and Direct CAD drawing of Schematics and Assembly drawings. Evaluation of vendors and suppliers for RoHS compliance and evaluation of assembly and PCB manufacturers.

PROFESSIONAL EXPERIENCE:

Confidential

Sr. Principal Engineer (Consultant

Responsibilities:

• VHDL and FPGA design for Aerospace to DO-254 Class B on Actel part. Write Requirements in IBM DOORS. Verilog and C programming for SOC on Artix FPGA. Hardware Verification on Blood Transfusion Machine. Hardware circuit design and C Firmware design of consumer Bluetooth BLE (low power) device on Cypress PROC ARM core.
• Hardware power supply, digital and analog circuit design for Surgical Insafflator, Firmware programming in C on I2C interface for Kinetis K22 with ARM M4 core. Circuit Board Layout in Altium. Code, and Test J1939-CAN Protocol Stack in C programming on Freescale Kinetis K60, with ARM core M4. Circuit Board Layout in EAGLE. Design and Debug of battery powered Electromyography (EMG) circuit with Bluetooth for medical applications. Kinetis K70 with DDR2 and graphical RGB display with touch screen, Wifi, and Cellular subsystems for medical Surgical Heater Blanket Control. Altium.

Confidential

Principal Engineer

Responsibilities:

• Test and Integration of Ultrasound medical device containing USB3.0, USB2.0, Xilinx Kintex, Xilinx Zynq FPGA with embedded ARM core processor, Lattice ECP3 FPGA, Lattice Mach X02, DDR debug, LVDS SerialIO. Write FPGA test code in Verilog and VHDL for testing and Signal Integrity measurements. Xilinx Vivado tool with TCL, Lattice Diamond tool, Modelsim. Debug of power up voltage rail sequencing for FPGA powerup.

Confidential, Eden Prairie, MN

Principal Engineer (Consultant)

Responsibilities:

• Writing Embedded Firmware for LCD Display driver GUI in object orientated C on Freescale Kinetis K60 Arm M4 core microcontroller using SPI interface, for use in industrial controls, smart meter, and vehicle applications, using CodeWarrior tools. Agile Development.

Confidential

Principal Engineer (Consultant)

Responsibilities:

• Design and Integration of Isolated CAN J1939 onto Freescale MCF5213 MCU for power generator equipment for a Military Customer. Embedded Firmware Evaluation of CAN software considerations for Address Claim, and Hardware EMC/EMI. Circuit design in Zuken CR-5000. Use Vector Informatik CAN scope to debug CANbus Auto ID firmware, and debug Inter-processor UART communication. EMC Testing to MIL-STD-461F and IEC 61000-x-x. Environmental testing to MIL-STD-810G and MIL-STD-705C. Debug of AC power metering chips by evaluating Embedded Firmware C code for proper execution and validation of calibration process.

Confidential, Eden Prairie, MN

Principal Engineer (Consultant)

Responsibilities:

• Advanced FPGA Design using Altera Quartus II tools, Embedded Firmware C programming on CAN controller with Graphical LCD screen using Codewarrior, Eclipse, and PEMicro multilink tools, updating GUI menu system, and implementing command parser UART utility to talk to PC running terminal application for runtime status, configuration and debug of HC08 and Kinetis K60 Coretex M4 ARM processor, also learning Microsoft Visual Studio C# in order to program windows GUI for command interpreter from PC to controller. Agile Development.

Confidential, New Hope, MN

Principal Engineer (Full time) FPGA Designer

Responsibilities:

• Embedding NIOS II microprocessors inside of FPGA, designing Video and Audio Intellectual Property (IP) inside of FPGA’s for High Definition Telecommunications equipment and cameras, utilizing high speed serial SDI video (3G) over fiber optic interface utilizing LVDS SERDES. Embedded Firmware C programming of I2C, SPI, and UART communications and drivers on small control loop RTOS of embedded NIOS II. System Architecture of overall operation and of creation of proprietary communication interface and command parser of NIOS II. Programming and register configuration of video codecs, encoders and decoders for Analog Video, and high definition HDMI, DVI, SDI video. Quartus II and Eclipse tools, Verilog, Altium. Quotes for and purchase of software licenses and test equipment (meters and oscilloscope) for developing FPGA’s. Agile Development.

Confidential, Brooklyn Park, MN

Principal Engineer

Responsibilities:

• Wrote low level device drivers for SPI interface to talk to FRam. Created Flash file indexing system for file storage and recovery after power loss. Re-wrote USB driver to fix enumeration problem on new hardware. Patch in new C code to work over MODBUS interface. Write driver to integrate SMX Flog code into file index system. Digital Hardware and Analog bandpass filter design, circuit board layout using Altium and EAGLE. VHDL for CPLD design of DMA memory controller and arbitration controller using Quartus II, Modelsim. Agile Development.

Confidential, Fridley, MN

Principal Engineer (Consultant)

Responsibilities:

• Saved company tens of thousands of dollars and several months in the schedule by eliminating a prototype manufacturing spin. Designed low cost, 60W, multi source, wide input 85VAC to 635VAC current mode switching power supply with power factor control using high voltage mosfet, discrete components, and 2 controller chips. Schematic design, Board layout in Zuken CR5000. MIL-STD Verification testing. Re-Designed SPI interface for LED Bar graph Display, with active voltage sensing, active current sensing, measured by micro controller A/D converter. CPLD design in VHDL for SPI data multiplexing and data flow control. Design for EMC compliance and EMC testing. Passive Filter design and simulation.

Confidential, Eden Prairie, MN

FPGA Designer (Consultant)

Responsibilities:

• Created FPGA Design that provided a 4x performance increase in USB data throughput while eliminating dropped messages and communication errors. VHDL design interfaced High speed USB 2.0 (480Mb) Cypress CY7C68013A to Texas Instr. DSP TMS320C6727 using Altera Cyclone II, EP2C35F484C7 FPGA. Wrote VHDL source code utilizing combinatorial and registered logic, state machines, and arbitration circuits along with test bench for FPGA in VHDL using Quartus II tools and Modelsim, C Programming in Labwindows environment for debug. Progress reporting of critical tasks.

Confidential, Eden Prairie, MN

Principal Engineer (Consultant)

Responsibilities:

• Wrote 40 page patent application, and received patent on Timer and Battery Discharge. Embedded Firmware C programming and algorithm development, for timing circuit and calculation of battery lifetime / State Of Charge (SOC). C programming and hardware design of CAN/LIN Controller development system with Graphical LCD, 12 digital outputs, 12 Digital inputs, 8 A/D converter inputs, Variable 8v - 15v switching power supply to simulate load conditions on 12v lead acid battery using microcontroller, SPI digital pots, RS232, and VHDL for CPLD. ORCAD, EAGLE, and CodeWarrior tools. Project Management. Agile Development.

Confidential, Golden Valley, MN

Senior Engineer (Consultant)

Responsibilities:

• Finished RoHS Conversion several months ahead of schedule. Project lead and management of companies conversion to RoHS Compliance, Converting all parts, BOM’s, and Assemblies, to RoHS/lead free on DSP hardware, and Circuit board assemblies. Review of all companies circuit board assemblies and part datasheets to make design changes as needed for Compliance. Get prototypes in and perform Temperature Cycling, Shock, and Vibration testing.

Confidential, Golden Valley, MN

Senior Engineer (Consultant)

Responsibilities:

• Managed multiple projects at the same time while still providing excellent attention to detail. Project lead in companies conversion to RoHS Compliance, Converting parts to lead free, Hardware re-design, CPLD programming, Manufacturing support and debug of DSP Hardware with CCD processor, laser sensor and flex circuit. Debug of VME processor board. EMC Testing. Impedance matching for firewire 1394 for new RoHS laminate on DSP. Circuit board layout for manufacturing test fixture. Design for EMC compliance and EMC testing. ORCAD.

Confidential, Plymouth, MN

Senior Engineer

Responsibilities:

• (Consultant) Completed analog/digital, multiple Redundant I/O contact, fault monitoring, Emergency Stop safety switch with redundant PIC and Phillips microprocessors monitoring contact closure using mentor graphics PADS. Analog/Digital circuit design, Circuit design for EMC compliance, EMC testing, HALT/HAS testing.

Confidential, Bloomington, MN

Senior Engineer (Consultant)

Responsibilities:

• Found FPGA design bug in FFT filter previously undiscovered by entire design team. Test Engineer on avionic/space/military computers containing PowerPC, FPGA, ASIC, PCI bus, VME bus, Flash, RS422, serial MIL-STD-1553, and SDram. Performed FPGA to ASIC conversion performing design simulations and verification in Verilog XL., Memory system debug, test, integration, and circuit level debug of multiple circuit cards on VME Bus including VME Bus to PCI Bus conversion card. Unix Cadence tools. Responsible for multiple different circuit assemblies in same project, at the same time.

Confidential, Eden Prairie, MN

Senior Engineer (Consultant)

Responsibilities:

• Research for hand held computers, for use as Foundation Fieldbus tool based on Renasas SH4 processor. created specification, research product concept and feasibility, Digital circuit design, BOM generation and cost analysis. Intrinsic safety. Wrote SBIR federal grant proposal for further funding of the project.

Confidential, Bloomington, MN

Senior Engineer

Responsibilities:

• (Consultant) Transform outdated controller to state of the art technology for use in SIL-2 safety areas. Define specification / theory of operation and Design from scratch, extremely complex Fire and Gas Safety System Logic Controller using VHDL on Xilinx CPLD’s, PowerPC, Flash, SDRam, AMD186, Control-net, Ethernet, Lonworks, RS485, Modbus, Dual Port Ram, on Controller with VFD display. Firmware for Board start up and configuration. Design for EMC compliance. Sole EE on project from cradle to grave that Introduced new complex state of the art controller technology to this company. Got first prototype to work with minimal rework, absolutely unheard of on design of this complexity, saving tens of thousands of dollars, and saving months on the schedule. Project management of critical tasks, time reporting, management of external consultants.

Confidential, Data Panel, MN

Senior Engineer (Full time)

Responsibilities:

• Multiple different Embedded Firmware projects using C programming and Assembly language and also Multiple Digital and Analog circuit design projects in a structured design environment. EMC testing.