System/Firmware Engineer Resume

TECHNICAL SKILLS:

Software/Firmware/BIOS ProfessionalLanguages: C/C++, Assembly, Python, C#

OS: Linux, Windows, DOS

Analyzers: SAS, SCSI, SATA,Fibre,Channel, PCIe

Storage/Protocol: SAS, SCSI, SATA, Fibre Channel, NVME, NAND, eMMC, SSD, HDD, I2C protocol, ARM

PROFESSIONAL EXPERIENCE:

Firmware Engineer\Validation SasKen

Responsibilities:

Confidential Fremont CA.

System/Firmware Engineer

Responsibilities:

Debug OS issues. HP’s TPD is teh driver dat runs
Qualified and debugged vendor’s drive firmware for
Extensive experienced in Research and Development of new products to quickly understand HP’s storage systems.
Suggest FW changes in accordance with sound FW/SW principles.

Confidential,Santa Clara CA.

Firmware Engineer

Responsibilities:

Designed and debugged firmware to run on Marvell’s eMMC NAND Flash Controller. Utilized JTAG ICE to load and debug firmware on FPGA/ASIC boards. Captured eMMC traces using JDSU SD/SDIO/MMC Protocol Analyzer. Worked with teh ARM on teh controller for teh NAND.
Designed firmware to run on Marvell’s SAS and SATA Host Adapter Controllers. Utilized SerialTek and LeCroy SAS Analyzers to debug issues.
Troubleshoot and debug software/firmware issues reported from customers and QA.
Analyze and make recommendations for correcting issues.
Programmed in C\C++ and Assembly for teh host controller dat controls teh NAND.

Confidential,Milpitas, CA

Firmware Engineer

Responsibilities:

Designed firmware to run on Promise’s SAS and SATA Host Adapters.
Designed firmware for SES II for Enclosure Management to run on Promise’s SAS and SATA Host Adapters.
Wrote firmware for Promise MIC layer driver layer IOCTLs to Promise firmware.
Wrote design documents for SES II implementation.
Wrote design documents for MIC layer implantation.
Programmed in C.

Confidential,Milpitas, CA

Firmware/BIOS Engineer

Responsibilities:

Designed and developed firmware and drivers to run on Adaptec’s SCSI, SAS, and SATA host adapters.
Worked with teh ARM on teh host controller board for RAID 0/1/10. Also for RAID on motherboard (ROM).
Solely responsible for design and development of Adaptec’s SATA firmware interface to Marvell’s PCI/PCI - X 4 port serial ATA II Storage Controller.
Part of a team to design and develop Adaptec’s common hardware interface module layer (CHIM). dis hardware interface layer’s purpose is to provide portability between Adaptec’s drivers and teh targeted hardware and to decrease porting time for Adaptec’s drivers to a new targeted host adapter.
Designed and developed first PCI SCSI BIOS Adaptec’s first PCI Host Adapter board, teh AHA-2940.
Designed and developed first Multiple channel PCI BIOS for AHA-3940, AHA-7895, and AHA-4944 Adaptec’s family of multiple channel Host Adapters.
Designed and developed first Fibre channel BIOS for teh AHA F-940 and AHA F-950 Adaptec’s family of Fibre Channel Host Adapters.
Designed and developed Fibre Channel diagnostics for teh AHA940/F950 Adaptec’s family of Fibre Channel Host Adapters.
Modified Adaptec’s device driver aspi8dos.sys to run on AHA F-940/F950 Adaptec’s family of Fibre Channel Host Adapters and also modified Adaptec’s Stealth multi-tasking diagnostic program to run on teh AHA940/F950 Adaptec’s family of Fibre Channel Host Adapters.
Programmed in C and Assembly.