Senior Technil Lead Resume
CA
PROFESSIONAL SUMMARY:
- 9 years of work experience in designing and developing scalable network and telecom product development and software solutions. Experienced in embedded software development, system/infrastructure development and device driver programming for multi - chassis network product and good exposure in L2/L3 protocols; seeking a position in a dynamic, challenging work environment; Willing to learn new technologies; Motivated, detail oriented and taken part in all phases of STLC.
- Extensive development experience in C language and hands on development experience in C++ language and data structures.
- Extensive experience in device driver development for Broadcom chips FAP21V, PetraB and Triumph packet processor, and proprietary FPGA chip Crowbar-2 and board bring-up.
- Extensive experience in packet processing handling at packet processor and CAM/TCAM lookups, control and data plane packet handling.
- Extensive experience in COS, QoS, ACL, Queue mapping, and end to end flow creation between line cards during board bring-up phase.
- Extensive development experience in Interlaken interface validation, Statistics interface validation, QDR, DDR3 SDRAM memory test, traffic flow validation.
- Extensive development experience in flash device driver implementation such as AMIC A29L320A, Spansion S29AL032D and S29GL032N device driver implementation.
- Extensive experience in RTOS system programming implementation for QNX, Redhat Linux, OSE-RTOS, Mucho(Brocade) and exposure in RTOS functional components such as OS internals, IPC, Synchronization mechanism, Multi-thread programming and POSIX standard API’s.
- Experience in maintaining and issue handling on Layer 2 technologies such as VLAN, VTP, STP, RSTP, Ethernet protocols.
- Experience in maintaining and issue handling on Layer 3 technologies, IPv4, RIP, OSPF, ICMP, IGMP, BGP protocols.
- Extensive experience in virtualization and Hypervisor technologies and handled issues for virtualization components.
- Get involved SDN(Software Defined Network) agent CPqD integration in multi-chassis router and implemented handler modules to configure in line card packet processor.
- Having excellent debugging skills in multi-threaded environment and high proficiency with dynamic and static debugging analyzers such as Green Hills MULTI, GDB, Valgrind, Kcahegrind, Coverity and SDS.
- Have extensive experience in optimization techniques in which analyzing and identifying bottlenecks, improving CPU utilization, increase first level cache and second level cache usability, process level optimization, thread level optimization, synchronization issues.
- Hands on development experience in TCP-IP, TCP-Modbus protocol implementation and Socket Programming.
- Sound knowledge in IBM rational clear case, clear quest and get involved in all phases of SDLC Process.
- Possess excellent analytical skills with good communication and self-organizing skills, assertive and a committed team player.
TECHNICAL SKILLS:
Programming Languages: C, C++, Perl Scripting.
Network protocols: Ethernet, ARP, VLAN, STP, RSTP, VTP, IPv4, RIP, OSPF, ICMP, IGMP, BGP.
Packet processors: PetraB, FAP21v, Triumph.
RTOS/OS: QNX, RedHat Linux, OSE-RTOS, Mucho.
IDE/Compilers: GCC, QCC, gVim, Cscope, Ctags, Visual Slick Edit, QNX Momentics, Dynamic C.
Debugger/Profiler: Green Hills Multi, GDB, SDS, Valgrind tool suite (memcheck, callgrind, helgrind, Cachegrind), Kcachegrind, GCOV, LCOV, Insight Klockwork, Coverity.
Packet sniffers/Tools: IXIA, Spirent, Ethreal, Wireshark, TCPDump, IBM Rational Clear Case, Clear Quest.
PROFESSIONAL EXPERIENCE:
Confidential CA
Senior Technical Lead
Responsibilities:
- Leading Layer 2, systems and device driver team.
- Activities involved work item development and sustaining.
- Activities involved developing system features on demand and customer issues handling related to Layer 2 issues, CAM lookup, packet processing and virtualization.
- ACL validation and Broadcom’s Triumph packet processor related issue handling.
Environment: C, VLAN, STP, Triumph Packet processor, gVim, Cscope, Ctags, SDS Debugger.
Confidential, CA
Senior Technical Lead
Responsibilities:
- Leads PetraB traffic manager device board bring-up team.
- Activities involved interface validation (Interlaken interface, CPU interface, External memory access), QDR, DDR SDRAM validation.
- Do traffic test that involves NIF, System, Fabric port mapping, VOQ mapping, Queue map table access, Scheduler and credit flow configuration, loopback test, Ingress/Egress flow creation, Multicast, SSR configuration validation.
- Ensures end to end traffic flow verification.
- Implemented initialize and configure device driver and interface routines to interact application with driver and tested.
- Implemented device driver routine for proprietary chip crowbar 2 which is used to connect CPU and PetraB. Its duty involves providing control path between CPU and Petra and provides interface to collect statistics from Petra to CPU.
- Activities involved statistics interface validation, CPU data traffic interface validation, and internal sub block validation.
- Implemented initialize and configure device driver and interface routines to interact application with driver and tested. Activity: SDN CPqD agent porting
- Did feasibility analysis to port CPqD SDN agent in 8860 multi-chassis router.
- Added a new load module called sdn agent on both Management processor and Line CPU and ported to OSE-RTOS compatible.
- Implemented line module to handle hardware programming and flow configuration and packet processor.
- Did POC that SDN controller can communicate to Packet processor through MP->LCPU->Packet Processor using CPqD agent.
Environment: C, OSE-RTOS, PetraB Packet processor, SDN, Crowbar2 FPGA, gVim, Green Hills Multi Debugger, Perl scripting, IXIA, Spirent.
Confidential
Responsibilities:
- Designed this module in such a way to scale and give more performance.
- Implemented in a optimized way and utilized all architectural benefits to get higher performance.
- Provided support to various flash devices.
- Covered complete functional validation in unit testing to ensure the quality deliverable.
- Handled inter-module dependency and done various bug fixing.
Environment: C, OSE-RTOS, Green Hills Multi Debugger.
Confidential
Responsibilities:
- Designed this module in such a way to scale and give more performance.
- Implemented in a optimized way and utilized all architectural benefits to reduce CPU hog and increased event flow.
- Provided various event types that ensures fast critical event flow than least priority one.
- Covered complete functional validation in unit testing to ensure the quality deliverable.
- Handled inter-module dependency and done various bug fixing.
Environment: C, GeniOS, RedHat Linux, GDB, Vim, Virtual Machine environment, Clear Case, Clear Quest.
Confidential
Responsibilities:
- Designed this module in such a way to scale and give more performance.
- Implemented in a optimized way and utilized all architectural benefits to reduce CPU hog.
- Provided various severities and logging classes to ensure effective classification.
- Covered complete functional validation in unit testing to ensure the quality deliverable.
- Handled inter-module dependency and done various bug fixing.
Environment: C, Linux, Hypervisor, Virtualization, GDB, gVim.
Confidential
Lead Engineer
Responsibilities:
- Designed this module in such a way to scale and give more performance.
- Implemented in a optimized way and utilized all architectural benefits to increase CPU utilization efficiently.
- Covered complete functional validation in unit testing to ensure the quality deliverable.
- Handled inter-module dependency and done various bug fixing.
Environment: C++, Redhat Linux, Valgrind tool suite, Insight Klockwork, GCov, LCov, TCPDump, Ethereal.
Confidential
Responsibilities:
- Designed this module in such a way to scale and give more performance.
- Implemented in a optimized way and utilized all architectural benefits to increase CPU utilization efficiently.
- Collect all system inventories and handles system level events such as temperature, fan cooling, card health status, OIR status.
- Handled inter-module dependency and done various bug fixing.
Environment: C, C++ in QNX Neutrino RTOS and Redhat Linux environment, Valgrind tool suite, Insight Klockwork.
Confidential
Responsibilities:
- Designed this module in such a way to scale and give more performance.
- Implemented in a optimized way and utilized all architectural benefits to increase CPU utilization efficiently.
- Ensured 99.999% of availability at hardware level by implementing state machine and handled all possible events;s various scenarios covered.
- Handled inter-module dependency and done various bug fixing.
Environment: C, C++ in QNX Neutrino RTOS environment.
Confidential
Protocol Developer
Responsibilities:
- Designed this module in such a way to scale and give more performance.
- Implemented in a optimized way and utilized all architectural benefits to increase CPU utilization efficiently.
- Implemented state machine model to switch TCP/IP packet to Modbus data and vice-versa.
- Handled inter-module dependency and done various bug fixing
Environment: C, Assembly (Rabbit 3000, Rabbit 4000), Rabbit uC | OS-II, TCP, IP, Modbus, I2C, RS232, RS485.
Confidential
Responsibilities:
- Designed this module in such a way to scale and give more performance.
- Implemented in a optimized way and utilized all architectural benefits to increase CPU utilization efficiently.
- Ensured all sensor data collected periodically from all sensors.
- Handled inter-module dependency and done various bug fixing
Environment: C, Assembly (ATmega 128, ATmega32), I2C, Modbus, RS232, RS485.