SUMMARY:

• Design and software validation for Bluetooth, Wi - Fi, Wlan, GPS and FM products for mobile devices,
• Resolved all Co-ex in-house and customer line down showstopper.
• Hands on experienced with Wi-Fi, Bluetooth system software release QA, Debug Classic and BLE regression test failures.
• Used Bluetooth protocol analyzer validate Bluetooth device interface (A2DP, AVRCP, HFP and HID device).
• 8 years of experience with GPS, WLAN, Bluetooth power consumption by isolating which blocks are
• Consumed most current and worked with firmware to shut down hardware is not used.
• 8 years of experience with GPS, FMRX, FMTX, WiFi, WLAN, BLE regression, Bluetooth regression, Arm core on smart phone combo chip.
• 8 years of experience in developing and debug PERL test script for new, functions, features, wrote Perl script for automated test report.
• Team player with excellent communication and interpersonal skills.
• Led and Facilitated High performance teams and provided .
• Led six sigma teams to Improve production yield, quality and designs issues.

PROFESSIONAL EXPERIENCE:

Confidential, Santa Clara, California

SR. Wireless system test Engineer

Responsibilities:

• Validate: WiFi, Bluetooth system software release for smart phone, tablet, Chrome and notebook platform.
• Verified: WiFi, Bluetooth OTA coexistence failure and Bluetooth throughput failures.
• Verified: Bluetooth stack profile test debug failures using Ellisys OTA sniffer.
• Verified: Bluetooth profile tests and functional test for (A2DP, AVRCP, HFP and HID devices).
• Resolved: All system test failures worked with firmware hardware design team, used Bluetooth Ellisys
• Protocol analyzer validate Bluetooth device interface and test failures.
• Automated: Build WiFi Bluetooth coexistence automated tester, test new build every week report results.
• Resolved: All system test failures worked with firmware hardware design team, used Bluetooth

Confidential, Santa Clara, CA

DVT Test Engineer

Responsibilities:

• Validated: GPS, FMRX, FMTX, WiFi, WLAN, BLE regression, Bluetooth regression, Arm coren smart phone combo chip.
• Verified: PCM1, PCM2, I2S, I2C and UART timing.
• Design Validation: GPS, WLAN, Bluetooth power consumption by isolating which blocks are consumedmost current and worked with firmware to shut down hardware is not used.
• Developed and debug: PERL test script for new, functions, features, wrote Perl script for automated test.
• Wrote: Test procedure and spec. for new products, release new products to production.
• Qualified: New product qualification, yield analysis and yield improvement.
• FW Validation: Worked with Firmware and Design team to resolve all software and hardware issues.
• RMA: Bench tested RMA, resolved test escape problem and provided feedback to ATE.

Confidential, Fremont, CA

Staff Product Engineer

Responsibilities:

• Validated: New mixed signal analog and digital and interface products.
• Wafer Test: Wafer sort / ATE: Used Eagle system to characterize new and sustaining products.
• Verified: New custom features and new base designs.
• Fab Transfer: Transferred sustaining products from Exar Fab to Jazz and Episil Fabs.
• Resolved: Worked with design engineers to resolved process between Exar, Jazz and Episil Fabs.
• Qualified: New products used ATE, Bench test and burn-in tests.
• Released: New products to production.

Confidential, Alviso, CA

Staff Application Engineer

Responsibilities:

• Validated: HDTV, HDMI, LCD, LVDS, Audio/video devices.
• Verified: On chip PLL, DLL, spread spectrum and system timing.
• Software QA: Firmware and device driver.
• Created: New product application notes and datasheet.
• Released: New products to production.
• Resolved: All firmware and designs issues.
• Trained: New field and application engineers.

Confidential, San Jose, CA

Senior Product Engineer

Responsibilities:

• Validated: New mixed signal Analog/Digital PLL, SDRAM, DDR1 products 3.0 GHz VCO.
• Automated: Bench setup using Labview and M1 jitter test software.
• Reduced cycle time: Reduced cycle time from 18 months to less than 3 months.
• Fab Transfer: Transferred products between TSMC, UMC and Charter Fabs.
• Resoled: Worked with design engineering to resolve Fab transfer issues.
• Released: New products to production.
• Design Review: Attended all new products design reviews.
• Trained: New product, application and field engineers.

Confidential, San Jose, CA

Senior Product Engineer

Responsibilities:

• Validated: New PLL clock, mixed signal and Low/High Voltage switches.
• Released: New products to production.
• Resolved: Sustaining products yield issues.
• Provided: Provided technical support to resolve customer issues.

Confidential, Santa Clara, CA

Manufacturing Engineer/Product Engineer

Responsibilities:

• Validated: New PLL Clock, mixed signal and SOC devices.
• Transferred: Linear wafer sort and ATE test to Malaysia.
• Resolved: All production low yield issues.
• Led six sigma teams: Improved production yield, quality and designs issues.
• Reviewed: Engineering change requests.
• Provided: Production on new products and procedures.
• Led and Facilitated: High performance teams and provided .

Confidential, San Jose, CA

Senior System Integration Engineer

Responsibilities:

• Integrate: Polaris 50/100 and MegaOne VLSI test systems from scratch.
• Debugged: System and board level problems.
• Software QA: Validated System software releases.
• Wrote: MegaOne maintenance manual from scratch.
• Provided: New system integration, board technicians and field engineer .

Confidential, San Jose, CA

Senior System Integration Engineer

Responsibilities:

• Integrate: S20/21 VLSI test systems from scratch.
• Debugged: System and board level problems.
• Software QA: Validated System software releases.
• Wrote: Test procedure for production test.
• Provided: New system integration, board technicians and field engineer .

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