SUMMARY:

• I am very familiar with Linux operating system, installing RHEL5 or RHEL6, performing Unix Linux Admins (root sudo) add users, groups, etc., Windows, Sun Solaris, HPUX, Exceed On Demand, VNC, NoMachine, MS - Office. I am also familiar with productivity application such as MS-Excel, MS-Power Point, Visio, MS-Word, Internet Explorer, Firefox, Netscape, and MS-Outlook.
• I have over 17 years of experience with CAD/DA support and development of Analog/RF custom circuit design environment. This position encompasses recommendation, downloading, installation, validation and integration of PDK collaterals, stdCells libraries and EDA tools such as Cadence Virtuoso IC5 or IC6, MMSIM, Assura QRE, Encounter, AMS (Mixed Signal), and Virtuoso-XL; Mentor Eldo, ADVMS and Calibre; Synopsys ICV, Hercules, StarRCXT, Hspice, and XA. ADS Agilent simulator. I also integrated Design Sync, ClioSoft, or IC Manager into Cadence DFII, customized DS menus, setup and enforced tag, managed libraries, cache, and users access.
• I am very sufficient with multiple scripting languages such as Perl, UNIX shell, csh, bash, Tcl, Skill (Cadence specific) that is commonly used in EDA CAD/DA application development and integration.

PROFESSIONAL EXPERIENCE:

Confidential, San Diego, California

Sr CAD Engineer

Responsibilities:

• Responsible for daily resolving issues with EDA application tools like Cadence, Keysight ADS, Mentor Caliber, Cliosoft and creating project for design team cross-sites, purchase (EDAon account) and install EDA licenses as needed. Linux Admin responsible for adding users, Unix group, access, permission, installing application patches, all EDA licenses, and monitoring license servers and usage using RTDA and Flexera LM. I am also a member of PDK development team where I modified Pcell and CDF skill scripts for enhancement internal PDK to release as scheduled to support the design team.

Confidential, Baltimore, Maryland

Sr MicroElectronics CAD Administrator and PDK Developer

• Responsible for developing and supporting a custom Analog RF and digital Design Environment for multiple projects with different Foundries PDK like MMIC, Gaas,Gan, Global-Foundry IBM, and Jazz Founries, which including installation of all EDA Software tools like Cadence IC6, ICADV12, MMSIM, Assura QRE, Encounter, PVS, Mentor Caliber, Synopsys ICV StarRC-XT, ADS Agilent. Plus supporting Analog and Digital design teams with debug, and performing root-cause analysis. I am also a CAD Unix Admin responsible for creating project disk space and working area for design team, adding users Unix account and groups and providing access to projects and PDK according to project management requests.
• PDK development, my responsibility is download Global Foundries 14lpp and 22FD, customized to meet our internal flow, implemented scripts to perform full QA on PDK like simulation, DRC, LVS, QRC/Assurra extraction and generated extracted views before release PDK to production area. Also validated ARM Standard Cells IP libraries and generated necessary cell views for design needs.

Confidential, Chandler, Arizona

Custom CAD/DA

• Developed and created project for custom IP develop team. Installed Cadence IC61, MMSIM, PVS, Assura, Mentor Calibre, Synopsys StarRC-XT. Helped designers with debug and resolve issues with tools like IC61, PVS, Calibre, and StartRC-XT.

Confidential, Chandler, Arizona

Custom Analog CAD Engineer

• Component Design Engineer HDK member, downloaded and packed all the PDK collaterals for different processes like 22nm, 14nm, 10nm, and 7nm technology nodes. Performed PDK libraries validation, QA and released to production area, which included all Custom Analog/Digital, primitive, stdCells libraries, and model libraries for simulation.
• Supported and performed root-cause analysis of issues for external and internal customers using Apache Totem RV (Reliability Verification) on different PDK processes like 22nm, 14nm, and 10nm. Provided customers with training, labs, Engineering AppNote, hot fixes and demonstration on the go. Also developed Custom RV Flow using Apache Totem engine. Performed installation, QA, and validated Totem flow to qualify Totem production version and released for production use.
• Developed and supported Custom Design Environment for 32nm, 22nm, and 14nm projects using (UE) Unified Environment for design team. Also maintained and controlled all disk spaces, machines, CSD pools, and Unix groups for the design community.
• Implemented ERC (Electrical Rules Check) for various processes through generating Tcl rule files, wrote Tcl and Skill scripts for schematics, and symbols conversion between processes like 90nm, 65nm, 40nm, 32nm, 22nm, and 14nm technology nodes for circuit design team.
• Owner of Atlas Custom Analog environment and led custom CAD/DA team in support, EDA Tools integration and setup like Cadence Virtuoso; MMSIM, DesignSync; Synopsys ICV; Hspice, Spectre, Mentor Eldo and Calibre. Plus development activities of custom Analog/RF design environment including tools flow, methodology, implementation, documentation like Physical Verification flow and developed GUI for users using Hercules/VUE as backend engine, StarRCXT extraction back-annotation flow, developed client Design Sync DFII documents and provided training for DA team and design team in using tools flow within Atlas design environment.
• Led the E2E Validation Team in Set-Top Box products for HPG (Home Product Group). Implemented automation testing Tcl and Bash scripts, test cases, Selenium GUI testing, and execution Menu for testing Linux Dot-Station client using Android.
• Installed Linux, Window servers and clients software and posted SW build releases on Website plus performed root-cause analysis as needed.
• Implemented test cases and performed validation testing and regression testing between the server and the client software build releases. Also performed regression test of Aegis Pay-Per-View Set Top Box product and compared with Intel Set Top Box .

Confidential, Phoenix, Arizona

Lead Engineer Configuration Management and Software Validation Eng.

• Wrote Perl scripts to improve the process of building software loads, posting software build and compiling source codes. Performed Configuration Management and coordinated Visual SourceSafe as Data Management to build scheduled software built, installed and performed validation testing software and hardware in-the-loop and released to internal customers.