Analog Design Engineer Resume

SUMMARY

Proficient in Custom IC layout design using technology nodes: TSMC 28nm, TSMC 40nm, IBM 180nm.
Virtuoso Layout Editor L & XL - Engineering Change Order (ECO), Generating clones, Constraints driven routing, Interative routing, Module generator, Floor planning, Auto & Manual routing etc.
Matching techniques, Shielding, Guard rings,DRC, LVS, ERC, Parasitic reduction and Debugging reliability issues such as HV, ESD, Latch Up, IR Drop, EM Violations etc.
Worked in developing analog, power management, RF modules such as LDOs, Bandgap reference, Buck, Boost, Phase locked loop.
Layout Implementation of all standard cells such as NAND, NOR, MUX, OR, AND, DFF and analog building blocks - amplifiers, comparator, oscillator, voltage and current reference circuits etc.
All layout activities including top, cell & block level creation, edit and verification.
Cadence design environment: Virtuoso ADE L, Spectre, Virtuoso layout editor, DRC, LVS, Layout extraction, Hirerchy editor.
Designed, validated power controllers such as Boost, Buck, LDOâ€™s with feedback and compensation techniques.
Behavioural modeling of PMW, DC-DC controllers, gate drivers and opamps etc.
Device characterization testing for ADCâ€™s and Operational amplifiers (Developed ATE SW and HW).
Expertise in design and development of mixed signal electronic circuits.
Designed signal processing circuits for analog and digital sensor interfaces such as pressure, temperature, and hall-effect based sensors.
Implemented quality tools like FMEA (Failure Mode Effect Analysis), DRBFM (Design Review Based on Failure Mode), and DAR (Decision Analysis).
Hands on experience in circuit simulations (Monte-carlo and Worst-case) and circuit modeling using SABER tool.
Strong lab and silicon validation skills. Expertise in building the required test setup, module verification, HV (High Voltage) testing and environmental testing & knowledge on EMI/EMC.

PROFESSIONAL EXPERIENCE

Confidential

Analog Design Engineer

Responsibilities:

Worked on 28nm and 40nm RFIC circuits such as Oscillator, Ring PLLs, LC PLLs, and LDOs etc.
Carried out module design activities such as PSS and Pnoise analysis, PVT simulations, Floor planning, Constraints driven routing, Layout, Manual routing, Extracted simulations, Top-level mixed signal verification using AMS Designer & Hierarchy editor.
Project 2: Hardware Module development in Power Electronics Control Unit, Hybrid vehicles.
Designed sensor interface modules and signal processing circuits etc. for the system requirements in hybrid vehicle. Activities also include Monte-Carlo, Worst-case analysis for the designed circuit.
Developed micro-controller (MC9S12G128) hardware with I2C communication interface.
Designed LDO regulator with higher current capability and calculated power dissipation, timing, PCB area.
Other duties include FMEA, DRBFM, DAR, SABER simulations, bench module validation, thermal testing and report preparation.
Critical measurements with high switching currents in simulated electric vehicle environments.
Designed an output tank section for the required wattage of lamp.
Design validation of sub-modules such as voltage and current sensing circuits, half bridge driver, PFC, resonance tank (LC) and filament preheating current source.
Hard switching evaluation and thermal testing.
Calculating the power stress on individual components of schematic.
Calculating the loading on the sources such as SMPS Regulators and buck-converters.
Component Engineering: Updating & replacing the non-ROHS components.
Good presentation skills and prefer to do team work with initiative taking.
Can provide necessary support for the project at any phase.

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